Sparse Delta Memory: Scaling the State of Linear RNNs through Sparsity
Sparse Delta Memory (SDM) is an extension of Gated DeltaNet that scales the linear-RNN hidden state by orders of magnitude using a sparse addressing scheme — replacing the dense key–value outer-product update with sparse reads and writes into a large explicit memory. Under an iso-FLOP + iso-parameter constraint, higher explicit-state capacity lifts in-context learning and long-context retrieval performance, closing part of the recall gap that pure linear-attention primitives still concede to softmax attention. Making the memory’s initial state a learned parameter turns SDM into a parametric-memory substrate as well: the same architecture then improves on common-knowledge and reasoning benchmarks. The paper is directly relevant to the hybrid-linear-attention thread — it is a new linear primitive whose recall/FLOP curve is shaped by memory addressing rather than by state-vector width.
Key claims
Section titled “Key claims”- Increasing the hidden-state size of gated linear RNNs improves long-context recall, but with a dense KV outer-product the compute scales unfavorably — motivating a sparse addressing scheme that decouples state capacity from per-token FLOPs [§Abstract].
- SDM extends the Gated DeltaNet architecture by replacing the dense key–value outer product with sparse reads and writes into a large explicit memory [§Abstract].
- Under an iso-FLOP constraint and an identical parameter count, higher state-memory capacity via SDM significantly improves performance on in-context learning and long-context retrieval tasks relative to the dense-outer-product baseline [§Abstract].
- Making the initial state of the SDM memory a learned parameter turns the explicit memory into parametric memory and further improves the model on a wide range of common-knowledge and reasoning tasks [§Abstract].
Method
Section titled “Method”SDM is built on top of Gated DeltaNet. In standard delta-rule linear attention, each token forms a dense key–value outer product that additively updates a matrix state; total state capacity is bounded by the (small) hidden dimension because every update touches every state cell. SDM changes the update rule: keys are used as a sparse address into a much larger explicit memory bank, and only the addressed slots are read and written per token. This makes the memory capacity a free parameter (orders of magnitude larger than the dense-state analog) while keeping per-token compute roughly constant — the FLOPs shift into sparse gather/scatter rather than dense outer-product accumulation. When the initial state of that memory is trained along with the rest of the network, the same slots serve as parametric memory: knowledge stored across pretraining lives in the memory bank and is retrieved by the same sparse addressing at inference.
Results
Section titled “Results”The abstract reports two headline outcomes under an iso-FLOP + iso-parameter setup:
- In-context learning and long-context retrieval: SDM with a larger sparse memory beats the Gated DeltaNet baseline at matched FLOPs and parameters — the recall gap that motivates hybrid linear-attention stacks (linear primitive + softmax anchors) shrinks when the linear branch is given more state capacity through sparse addressing rather than through a wider dense state.
- Common-knowledge and reasoning benchmarks: learning the SDM memory’s initial state (parametric-memory mode) yields further gains on a “wide range” of these tasks.
Numerical multipliers, scales, and per-benchmark deltas are not disclosed in the abstract; the arXiv HTML body was not retrieved in this ingest.
Why it’s interesting
Section titled “Why it’s interesting”SDM sits at the intersection of two live threads on the wiki. First, on Hybrid Linear Attention: the current cluster is dominated by layer-wise recipes (Kimi Linear 3:1 KDA:MLA, MiniMax-M1 7:1 lightning:softmax, Qwen3-Next Gated DeltaNet + Gated Attention) that try to close the recall gap by mixing softmax anchors into a linear stack. SDM makes a different bet — keep the stack linear, but give the linear primitive orders-of-magnitude more state via sparse addressing. If it holds up under head-to-head with softmax anchors on retrieval benchmarks, it argues the ratio question (“how much softmax do you need?”) is partly downstream of a state-capacity question (“how big is your linear state?”). It also complements HydraHead: From Head-Level Functional Heterogeneity to Specialized Attention Hybridization as another orthogonal axis (head-level vs state-capacity) on which the layer-wise ratio can be reduced.
Second, on Parametric memory: SDM is the first filed instance of architectural parametric memory inside a linear-RNN state — distinct from the FFN-embedding-table lever of STEM: Scaling Transformers with Embedding Modules (which is static and outside the sequence dimension) and from the router-state slot addressing of Raven Part 1 — Memory as a Set of Slots (which routes but does not grow the memory bank). The learned-initial-state trick is close in spirit to Long context as weights: at inference, the memory is “context that lives in weights”, except the addressing is sparse and per-token rather than a full LoRA emission or a full backbone SGD step.
See also
Section titled “See also”- Hybrid Linear Attention — SDM extends Gated DeltaNet, one of the primitives explicitly benchmarked in this cluster’s PostNAS bake-off
- Parametric memory — learned initial state of the sparse memory bank turns SDM into an architectural parametric-memory substrate
- Long context as weights — adjacent axis: SDM’s addressing is sparse-per-token where D2L / TTT-E2E / SEAL emit or SGD-update entire LoRA / backbone parameters
- Jet-Nemotron: Efficient Language Model with Post Neural Architecture Search — PostNAS argues KV-cache size, not parameter count, is the right efficiency target for linear-attention hybrids; SDM adds a “cache-shaped-as-explicit-memory” primitive to that search space
- Mamba-3: Improved Sequence Modeling using State Space Principles — Mamba-3 argues MIMO raises per-step FLOPs essentially free at decode; SDM raises per-step state capacity essentially free at decode via sparse addressing
- STEM: Scaling Transformers with Embedding Modules — STEM makes FFN parametric memory architectural via token-indexed embedding lookup; SDM makes recurrent-state parametric memory architectural via sparse key-based addressing
- Raven Part 1 — Memory as a Set of Slots — Raven’s Router State Model treats hidden state as a set of slots with a learned sparse router; SDM occupies a similar architectural niche but with an explicit large memory bank rather than partitioning a small dense state